1. Field of the Invention
This invention relates to logic state detection in electrical systems, and more particularly to sensing the electrical state of devices to provide an indication of the logical operating state of these devices.
2. Description of the Related Art
Sensing a change in electrical state is one of the fundamental operations in many logic based systems. Changes in electrical state may be a result of actuation of switches, energization of transistors, opening/closing of contacts or operation of other similar state changing devices capable of alternating between a conducting and a non-conducting state. In general, a data processor or other similar device senses changes in electrical state corresponding to changes between a xe2x80x9clogic onexe2x80x9d state and a xe2x80x9clogic zeroxe2x80x9d state.
Typically, the state changing device is part of a discrete circuit electrically connected with an input to the data processor. In addition, the state changing device is supplied a wetting voltage from the data processor or a power supply. The wetting voltage is provided to each discrete circuit such that the data processor senses the wetting voltage when the state changing device is in the conducting state.
When the data processor is used to sense a large number of state changing devices, time division multiplexing may be used to limit the number of inputs to the data processor. Time division multiplexing involves electrically connecting the state changing devices in a matrix. Multiple discrete circuits are similarly electrically connected in columns and rows of the matrix. With time division multiplexing, the data processor monitors an input electrically connected with a row (or column) and a wetting voltage is supplied to each column (or row). As such, the data processor senses the wetting voltage and captures the electrical state of each of the state changing devices by sequentially cycling through the rows and columns of the matrix.
When large numbers of state changing devices are to be scanned by the data processor, the matrix is correspondingly increased in size. Increased size of the matrix requires larger numbers of inputs to be monitored by the data processor as well as additional wetting voltages and discrete components. In addition to the increased hardware, wiring and power supply requirements; the data processor also includes additional I/O (input/output) pins to monitor the additional inputs. Further, the size of the data processor and associated hardware is increased to accommodate the additional wiring and I/O pins.
The present invention is defined by the following claims, and nothing in this section should be taken as a limitation on those claims. By way of introduction, the embodiments described below include a method and system for detecting the logic state of at least one state changing device with a logic state detection system. The method and system allows large numbers of state changing devices to be efficiently scanned while minimizing the quantity of discrete components, the number of inputs to a data processor and the amount of hardware and wiring. The logic state detection system detects the logic state of state changing devices electrically connected with a ground connection. In another embodiment, the logic state of state changing devices electrically connected with a power supply may be determined.
The logic state detection system of one embodiment includes a scanning circuit, a data processor and a current detection circuit. The logic state detection system is directed by the data processor to setup and scan the state changing devices. An output line electrically connects one or more of the state changing devices with one of a plurality of output ports included in the scanning circuit.
Setup and scanning of the state changing devices occurs during a setup mode and a scanning mode. During the setup mode, the scanning circuit activates all of the output ports and the corresponding output lines. Current supplied from the current detection circuit flows through the scanning circuit and the output lines to initialize the scanning circuit. Initialization of the scanning circuit provides low current flow during the scan mode. Low current flow minimizes electromagnetic interference (EMI) and maximizes power efficiency.
During the scan mode, the data processor directs the scanning circuit to selectively activate the output ports and corresponding output lines. Selective activation of the output ports is accomplished by providing a serial data stream to the scanning circuit while enabling portions of the scanning circuit with an enabling signal. When activated, the output ports allow current to pass through the scanning circuit to the corresponding output lines. The current detection circuit monitors current flowing to the output lines. The current detection circuit, as a function of the current, identifies the logic state of the state changing device(s) electrically connected with an activated output line.
The logic state detection system is expandable to provide detection of any number of state changing devices without substantial increases in the number of I/O pins required from the data processor. In addition, the logic state detection system minimizes the use of discrete components and maximizes the scan density thereby providing a very compact and space efficient system. Further, by sourcing current supplied to the state changing devices out of the logic state detection system, external power supplies and associated wiring are minimized.
Further aspects and advantages of the invention are discussed below in conjunction with the preferred embodiments.